CPU Physical Design Methodology and Optimization Engineer Job at Apple Inc., Santa Clara, CA

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  • Apple Inc.
  • Santa Clara, CA

Job Description

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! In this highly visible role as a part of an industry-recognized and innovative CPU design team; you will contribute to solving intriguing and key problems in the physical design (PD) methodology and optimization space. With a steadfast focus on improving Power, Performance and Area (PPA) of our industry leading CPU designs, you’ll have the opportunity to work with most teams in CPU design and influence SOC teams as well. You will also be actively contributing to new and exciting technical areas including applying machine learning techniques in the silicon design space.

Description

• Work with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions to understand optimization opportunity • Develop new PD focused flows to improve CPU performance and efficiency • Cross-functional collaboration across STA, library, tech and post silicon team to improve optimization during physical design

Minimum Qualifications

  • Minimum BS and 3+ years of relevant industry experience
  • Electrical engineering fundamentals in digital circuits, timing/power concepts, and logic design
  • Scripting skills to interface with tools and mine data

Key Qualifications

Preferred Qualifications

  • Strong fundamentals in high-performance & low-power physical design techniques
  • Experience in using industry standard synthesis, PnR, and STA tools
  • Proficiency in programming and scripting in Python, TCL, or Perl
  • Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract Power Performance & Area during physical design
  • Ability to work well in a team, self-motivated, and excellent communication skills

Education & Experience

Additional Requirements

Pay & Benefits

  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.

    Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

    Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
• Work with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions to understand optimization opportunity • Develop new PD focused flows to improve CPU performance and efficiency • Cross-functional collaboration across STA, library, tech and post silicon team to improve optimization during physical design

Job Tags

Relocation,

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